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HANBit
HMF2M64F8V
FLASH-ROM MODULE 16MByte (2M x 64-Bit) ,120PIN SMM,3.3V Part No. HMF2M64F8V
GENERAL DESCRIPTION
The HMF2M64F8V is a high-speed flash read only memory (FROM) module containing 8,388,608 words organized in an x64bit configuration. The module consists of eight 1M x 16 FROM mounted on a 120-pin, SMM connector FR4-printed circuit board. Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine, which controls the erase and programming circuitry. Write cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the device is similar to reading from 12.0V flash or EPROM devices. Output enable (/OE) and write enable (/WE) can set the memory input and output. The host system can detect a program or erase operation is complete by observing the Ready Pin, or reading the DQ7(Data # Polling) and DQ6(Toggle) status bits. When FROM module is disable condition the module is becoming power standby mode, system designer can get low -power design. All module components may be powered from a single + 3.0V DC power supply and all inputs and outputs are LVTTLcompatible
FEATURES
w Access time : 70, 90 and 120ns w High-density 16MByte design w High-reliability, low-power design w Single + 3V 0.3V power supply w Easy memory expansion w Hardware reset pin(RESET#) w FR4-PCB design w 120-Pin Designed by 60-Pin Fine Pitch Connector P1,P2 w Minimum 1,000,000 write cycle guarantee per sector w 20-year data retention at 125 oC w Flexible sector architecture w Embedded algorithms w Erase suspend / Erase resume
OPTIONS
w Timing 70ns access 90ns access 120ns access
MARKING
-70 -90 -120
w Packages 120-pin SMM F
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HMF2M64F8V
PIN ASSIGNMENT
P1 PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Symbol Vcc DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 Vcc DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 Vcc A1 A2 A3 A4 A5 Vcc A6 A7 A8 A9 Vcc PIN 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 Symbol Vss DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 Vss DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 Vss A10 A11 A12 A13 A14 Vss A15 A17 A18 A19 Vss PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Symbol Vcc DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 Vcc DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 Vcc A20 A0 A16 /WE1 /WE2 Vcc /OE /RESET /WE0 /RY_BY Vcc P2 PIN 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 Symbol Vss DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 Vss DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 Vss NC /BANK0 Vss Vss /WE3 Vss /WE4 /WE5 /WE6 /WE7 Vss
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FUNCTIONAL BLOCK DIAGRAM
DQ0 - DQ63 A0 - A20 64 21 A1-A20 A0 /WE0 A(0-19) DQ15 /WE /OE /CE RY-BY /RESE DQ(0-7)
HMF2M64F8V
A(0/WE4 DQ(32DQ15 /WE /OE
/BYTE
/BYTE
U2
/CE RY-BY /RESE
U6
A(0-19) DQ15 DQ(8-15) /WE1 /WE /OE /CE RY-BY /BYTE
/WE5
A(0-19) DQ(40DQ15
/WE /OE
/CE RY-BY /RESE
/BYTE
U3
U7
/RESE
/WE2
A(019) DQ15 DQ(16/WE 23) /OE /CE RY-BY /RESE
/WE6
/BYTE
A(0-19) DQ15 DQ(48/WE 55) /BYTE /OE /CE RY-BY /RESE
U1
U5
A(0-19) DQ15 DQ(24-31) /WE3 /WE
/WE7 /BANK0
A(0-19) DQ15 DQ(56-63)
/BYTE
/WE
/OE
/BYTE
/OE
/BANK0
/CE
RY-BY /RESE
U4
/CE
RY-BY
U8
/RESE
/OE RY_/BY /RESET
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TRUTH TABLE
MODE STANDBY NOT SELECTED READ WRITE or ERASE NOTE: X means don't care /OE X H L H /CE Vcc 0.3 L L L /WE X H H L DQ HIGH-Z HIGH-Z Dout Din
HMF2M64F8V
POWER STANDBY ACTIVE ACTIVE ACTIVE
ABSOLUTE MAXIMUM RATINGS
PARAMETER Voltage with respect to ground all other pins Voltage with respect to ground Vcc Storage Temperature SYMBOL VIN,OUT VCC TSTG RATING -0.5V to +0.5V -0.5V to +4.0V -65oC to +150oC
Operating Temperature TA -55Oc to +125 oC w Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
PARAMETER Vcc for 5% device Supply Voltages Vcc for 10% device Supply Voltages Ground SYMBOL VCC Vcc VSS MIN 3.0V 2.7V 0 0 TYP. MAX 3.6V 3.6V 0
DC AND OPERATING CHARACTERISTICS (0oC TA 70 oC ; Vcc = 5V 0.5V )
PARAMETER Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage Vcc Active Current for Read(1) Vcc Active Current for Program or Erase(2) Vcc Standby Current Low Vcc Lock-Out Voltage Notes: 1. The Icc current listed is typically less than 2mA/MHz, with /OE at VIH. 2. Icc active while embedded algorithm (program or erase) is in progress 3. Maximum Icc current specifications are tested with Vcc=Vcc max TEST CONDITIONS Vcc=Vcc max, V IN= GND to Vcc Vcc=Vcc max, VOUT= GND to Vcc IOH = -2.5mA, Vcc = Vcc min IOL = 12mA, Vcc =Vcc min /CE = VIL, /OE=VIH, /CE = VIL, /OE=VIH /CE= VIH SYMBOL IL1 IL0 0.85* VOH VCC VOL ICC1 ICC2 ICC3 VLKO 72 160 1.6 2.3 0.45 128 240 40 2.5 V mA mA mA V V MIN MAX 1.0 1.0 UNITS A A
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ERASE AND PROGRAMMING PERFORMANCE
LIMITS PARAMETER MIN. Sector Erase Time Byte Programming Time Chip Programming Time TYP. 0.7 9 18 MAX. 15 300 54.8 Sec s Sec UNIT
HMF2M64F8V
COMMENTS Excludes 00H programming prior to erasure Excludes system-level overhead Excludes system-level overhead
CAPACITANCE
PARAMETER SYMBOL CIN COUT CIN2 PARAMETER DESCRIPTION Input Capacitance Output Capacitance Control Pin Capacitance
o
TEST SETUP VIN = 0 VOUT = 0 VIN = 0
TYP. 48 68 60
MAX 60 96 72
UNIT pF pF pF
Notes : Test conditions TA = 25 C, f=1.0 MHz.
AC CHARACTERISTICS u Read Only Operations Characteristics
PARAMETER SYMBOLS JEDEC TAVAV TAVQV TELQV TGLQV TEHQZ TGHQZ TAXQX STANDARD tRC tACC tCE tOE tDF tDF tQH Read Cycle Time Address to Output Delay Chip Enable to Output Delay Chip Enable to Output Delay Chip Enable to Output High-Z Output Enable to Output High-Z Output Hold Time From Addresses, /CE or /OE, Whichever Occurs First /CE = VIL /OE = VIL /OE = VIL Min Max Max Max Max Max Min Speed Options DESCRIPTION TEST SETUP 70R 70 70 70 30 25 125 0 80 80 80 80 30 25 25 0 -90 90 90 90 35 30 30 0 -120 120 120 120 50 30 30 0 ns ns ns ns ns ns ns UNIT
Notes : Test Conditions Output Load : 1TTL gate and Output Load Capacitance 100 pF, in case of 55ns-30pF Input rise and fall times : 5 ns , In case of 55ns-5ns Input pulse levels : 0 .45V to 2.4V, In case of 55ns- 0.0V-3.0V Timing measurement reference level Input : 0.8V, Incase of 55ns-1.5V Output : 2.0V, In case of 55ns-1.5V
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3.3V
HMF2M64F8V
2.7k Device Under Test CL IN3064 or Equivalent
6.2k
Diodes = IN3064 or Equivalent
Note : CL = 100pF including jig capacitance
u Erase/Program Operations
PARAMETER SYMBOLS JEDEC TAVAV TAVWL TWLAX TDVWH TWHDX STANDARD tWC tAS tAH tDS tDH tOES TGHWL TELWL TWHEH TWLWH tWHWL tWHWH1 tWHWH2 tGHWL tCS tCH tWP tWPH tWHWH1 tWHWH2 tVCS Write Cycle Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time Output Enable Setup Time Read Recover Time Before Write /CE Setup Time /CE Hold Time Write Pulse Width Write Pulse Width High Byte Programming Operation Sector Erase Operation (Note1) Vcc set up time Min Min Min Min Min Min Min Min Min Min Min Typ Typ Min 35 35 30 9 0.7 50 45 35 45 35 0 0 0 0 0 45 50 Speed Options DESCRIPTION 70R 70 80 80 0 45 45 50 50 -90 90 -120 120 ns ns ns ns ns ns ns ns ns ns ns s sec s UNIT
Notes : 1. This does not include the preprogramming time 2. This timing is only for Sector Protect operations
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u Erase/Program Operations Alternate /CE Controlled Writes
PARAMETER SYMBOLS DESCRIPTION JEDEC tAVAV tAVEL tELAX tDVEH tEHDX STANDARD tWC tAS tAH tDS tDH tOES tGHEL tWLEL tEHWH tELEH tEHEL tWHWH1 tWHWH2 tGHEL tWS tWH tCP tCPH tWHWH1 tWHWH2 Write Cycle Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time Output Enable Setup Time Read Recover Time Before Write /WE Setup Time /WE Hold Time /CE Pulse Width /CE Pulse Width High Byte Programming Operation Sector Erase Operation (Note) Min Min Min Min Min Min Min Min Min Min Min Typ Typ 35 35 45 35 45 35 0 0 0 0 0 70R 70 80 80 0
HMF2M64F8V
SPEED OPTION -90 90 -120 120
UNIT
ns ns
45 45
50 50
ns ns ns ns ns ns ns
45 20 9 0.7
50
ns ns s sec
Notes : This does not include the preprogramming time.
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TIMMING DIAGRAMS u READ OPERATIONS TIMING
HMF2M64F8V
u RESET TIMING
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u PROGRAM OPERATIONS TIMING
HMF2M64F8V
u CHIP/SECTOR ERASE OPERATION TIMINGS
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HMF2M64F8V
u DATA# POLLING TIMES(DURING EMBEDDED ALGORITHMS)
u TOGGLE# BIT TIMINGS (DURING EMBEDDED ALGORITHMS)
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u SECTOR PROTECT UNPROTECT TIMEING DIAGRAM
HMF2M64F8V
u ALTERNATE CE# CONTROLLED WRITE OPERATING TIMINGS
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PACKAGE DIMMENSIONS
HMF2M64F8V
1.30 1.0mm
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ORDERING INFORMATION
Component Number 8EA 8EA 8EA
HMF2M64F8V
Part Number
Density
Org.
Package
Vcc
SPEED
HMF2M64F8V-70 HMF2M64F8V-90 HMF2M64F8V-120
16MByte 16MByte 16MByte
2M x 64 2M x 64 2M x 64
120 Pin-SMM 120 Pin-SMM 120 Pin-SMM
3.3V 3.3V 3.3V
70ns 90ns 120ns
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